This invention relates generally to high speed logic elements, and more particularly the invention relates to high speed complementary bipolar complementary MOS (CBiCMOS) integrated circuits including complementary Schottky bipolar CMOS integrated circuits.
My issued U.S. Pat. No. 4,920,399 and my copending application Ser. No. 07/528,950 filed May 25, 1990 disclose the use of CBiCMOS technology in constructing high speed logic elements. Simple CMOS logic inverters are described in which speed of operation is increased by merging complementary bipolar transistors in the CMOS devices. More particularly, in one embodiment Schottky contacts are made to the drains of the CMOS transistors and the Schottky p-n junctions become emitter-base junctions of the bipolar transistors. The Schottky contacts are interconnected to form the output of the invertor. Majority and minority carriers injected by the diodes modulate the channel regions of the MOS transistors, thereby lowering their resistivity and increasing the transconductance of the device without increasing the physical size or the capacitance of the device and thereby improving the speed of the device. Ohmic contacts can be made to the drain regions, and by interconnection of the ohmic contacts the low on resistance of the opposite polarity drive transistor extracts any excess stored charge in the drain region.
CMOS transmission gates are commonly used in CMOS technology to form multiplexer and flip-flop memory elements. However, the devices do not have sufficient current drive capability to be used effectively with high speed CBiCMOS technology. The present invention is directed to a high speed transmission gate using a CBiCMOS structure.